Szczegóły publikacji
Opis bibliograficzny
Dual stage time-over-threshold processing chain for silicon detectors with large capacitance / K. KASIŃSKI, R. KŁECZEK, P. GRYBOŚ, R. SZCZYGIEŁ // W: 2013 IEEE NSS/MIC [Dokument elektroniczny] : Nuclear Science Symposium & Medical Imaging Conference : October 27 – November 2, Seoul, Korea / guest ed. Yong Choi ; Institute of Electrical and Electronics Engineers. — Wersja do Windows. — Dane tekstowe. — [Piscataway : IEEE], cop. 2013. — 1 dysk optyczny. — e-ISBN: 978-1-4799-3423-2. — S. [1–4]. — Wymagania systemowe: Adobe Reader ; napęd CD-ROM. — Bibliogr. s. [4], Abstr. — W bazie Web of Science wersja drukowana. — ISBN 978-1-4799-0534-8
Autorzy (4)
Dane bibliometryczne
| ID BaDAP | 81321 |
|---|---|
| Data dodania do BaDAP | 2014-05-14 |
| DOI | 10.1109/NSSMIC.2013.6829762 |
| Rok publikacji | 2013 |
| Typ publikacji | materiały konferencyjne (aut.) |
| Otwarty dostęp |  |
| Konferencja | 60th IEEE Nuclear Science Symposium / Medical Imaging Conference / 20th International Workshop on Room-Temperature Semiconductor X-ray and Gamma-ray Detectors |
Abstract
This paper presents the architecture, simulation and measurement results of a low power dual stage charge sensitive amplifier providing a time-over-threshold analog to digital conversion with linear transfer characteristic dedicated for readout of long silicon strip detectors. The key features of the presented solution are: very low power consumption (2 mW), linear transfer characteristic and low charge losses at high detector capacitance. This work was motivated by the requirements of a new Silicon Tracking System at the Compressed Baryonic Matter experiment at FAIR centre. The issues investigated using other prototype ASICs implementing a constant-current discharge feedback and working with high detector capacitances (tens of pF) directed us to develop the presented idea and to evaluate it with a prototype ASIC. Up to our knowledge, due to the difficult operating conditions this solution fills the gap within the existing fabricated circuits.
