Szczegóły publikacji
Opis bibliograficzny
Design, verification and testing of a readout integrated circuit for hybrid pixel X-ray detectors with in-pixel time measurement functionality in 28 nm CMOS / Łukasz A. KADŁUBOWSKI // W: MIXDES 2023 [Dokument elektroniczny] : 30th international conference on Mixed Design of integrated circuits and systems : 29-30 June 2023, Kraków, Poland. — Wersja do Windows. — Dane tekstowe. — Łódź : Lodz University of Technology ; IEEE, cop. 2023. — Dod. ISBN 978-83-63578-23-7 (CD), 979-8-3503-1352-9 (Print on Demand). — e-ISBN: 978-83-63578-24-4. — S. 116–121. — Wymagania systemowe: Adobe Reader. — Bibliogr. s. 121, Abstr.
Autor
Słowa kluczowe
Dane bibliometryczne
| ID BaDAP | 150985 |
|---|---|
| Data dodania do BaDAP | 2024-01-16 |
| Tekst źródłowy | URL |
| DOI | 10.23919/MIXDES58562.2023.10203236 |
| Rok publikacji | 2023 |
| Typ publikacji | materiały konferencyjne (aut.) |
| Otwarty dostęp | |
| Wydawcy | Institute of Electrical and Electronics Engineers (IEEE), Politechnika Łódzka |
Abstract
This paper summarizes the design of a prototype integrated circuit for hybrid pixel X-ray detectors fabricated in 28 nm CMOS technology. The chip consists of 32 pixels with dimensions 50 μ m: × 50 μm each. Each pixel is divided into three sections: a front-end, two-ring oscillators with their frequency control circuits, and a digital part. It offers singlephoton counting functionality as well as in-pixel time measurement. In previous papers, a detailed design of the chip and simulation results were reported, and an approach was described that utilized System Verilog language together with the AMS simulator for the verification of this asynchronous, mixed-mode circuitry. This paper focuses more on testing fabricated chips. It describes a test setup and PCB design and mentions how the prior System Verilog verification approach helped with the development of a testing software. Finally, preliminary measurement results are presented that illustrate the performance of front-end and oscillators.