Szczegóły publikacji

Opis bibliograficzny

Automatic design of a cascoded-inverter-based charge-sensitive amplifier using $g_{m}/I_{D}$ technique and particle swarm optimization in 28 nm CMOS / Piotr KACZMARCZYK // W: MIXDES 2023 [Dokument elektroniczny] : 30th international conference on Mixed Design of integrated circuits and systems : 29-30 June 2023, Kraków, Poland. — Wersja do Windows. — Dane tekstowe. — Łódź : Lodz University of Technology ; IEEE, cop. 2023. — Dod. ISBN 978-83-63578-23-7 (CD), 979-8-3503-1352-9 (Print on Demand). — e-ISBN: 978-83-63578-24-4. — S. 92–95. — Wymagania systemowe: Adobe Reader. — Bibliogr. s. 95, Abstr.

Autor

Słowa kluczowe

gm/IDanalog front-endcharge sensitive amplifiercascoded inverteranalog design optimization

Dane bibliometryczne

ID BaDAP148261
Data dodania do BaDAP2023-09-21
Tekst źródłowyURL
DOI10.23919/MIXDES58562.2023.10203263
Rok publikacji2023
Typ publikacjimateriały konferencyjne (aut.)
Otwarty dostęptak
WydawcyInstitute of Electrical and Electronics Engineers (IEEE), Politechnika Łódzka

Abstract

In this paper, an automated design procedure of a cascoded-inverter-based charge-sensitive amplifier (CSA) using the g m /I D method and particle swarm optimization (PSO) is presented. Assuming certain fixed values, such as transistors' length, supply voltage, feedback resistance, and input, output and feedback capacitances, the algorithm is able to find the proper transistors' width and cascode biasing voltages, to meet specified requirements, such as power consumption, gain, bandwidth, input/output DC level and input-referred noise. A CSA designed in 28 nm CMOS technology using the presented method achieves 500 V/V gain, 3.7 MHz bandwidth and 71e − ENC, consuming 2.2 μW of power from a 1.1 V supply.

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