Szczegóły publikacji
Opis bibliograficzny
Low-power front-end ASIC for silicon photomultiplier / P. DOROSZ, M. BASZCZYK, W. KUCEWICZ, Ł. Mik // IEEE Transactions on Nuclear Science ; ISSN 0018-9499. — 2018 — vol. 65 no. 4, s. 1070–1078. — Bibliogr. s. 1078, Abstr.
Autorzy (4)
Słowa kluczowe
Dane bibliometryczne
| ID BaDAP | 113557 |
|---|---|
| Data dodania do BaDAP | 2018-05-10 |
| Tekst źródłowy | URL |
| DOI | 10.1109/TNS.2018.2816239 |
| Rok publikacji | 2018 |
| Typ publikacji | artykuł w czasopiśmie |
| Otwarty dostęp |  |
| Czasopismo/seria | IEEE Transactions on Nuclear Science |
Abstract
Thanks to its compact structure, mechanical endurance, and low bias voltage, the silicon photomultiplier (SiPM) can be used in small-size applications which require reduced power consumption. In order to detect the light intensity as low as a single photon, the front-end electronics has to amplify and shape the signal of the photodetector. The low-power design cannot impair the performance of readout electronics or limit the capabilities of the SiPM itself. This paper presents a two-channel integrated circuit (IC) designed in Austria Mikro Systeme CMOS 350-nm technology dedicated for the SiPM-based applications. The input stage is a super-common-gate architecture. Each channel of the IC consists of an amplifier and a peak detector with an offset reduction circuit. The power consumption of the single channel is less than 3 mW from the single voltage supply (3.3 V). Moreover, the number of channels of the IC can be easily increased thanks to small dimensions of the circuit. This paper presents a detailed analysis of the IC including: noise performance with adjustment of the input transistor’s size, transient and dc simulations of the amplifier and the peak detector, and the introduction of a simple offset reduction technique for the peak detector. The measurement results obtained with two SiPM detectors are presented.
