Szczegóły publikacji
Opis bibliograficzny
A power scalable 10-bit pipeline ADC for luminosity detector at ILC / M. IDZIK, K. ŚWIENTEK, T. FIUTOWSKI, S. KULIS, P. Ambalathankandy // Journal of Instrumentation [Dokument elektroniczny]. — Czasopismo elektroniczne ; ISSN 1748-0221 . — 2011 — vol. 6 no. 1, s. 1–14. — Tryb dostępu: http://iopscience.iop.org/1748-0221/6/01/P01004/pdf/1748-0221... [2011-03-24]. — Bibliogr, s. 14, Abstr.
Autorzy (5)
- AGHIdzik Marek
- AGHŚwientek Krzysztof
- AGHFiutowski Tomasz
- AGHKulis Szymon
- Ambalathankandy P.
Słowa kluczowe
Dane bibliometryczne
| ID BaDAP | 58384 |
|---|---|
| Data dodania do BaDAP | 2011-03-24 |
| DOI | 10.1088/1748-0221/6/01/P01004 |
| Rok publikacji | 2011 |
| Typ publikacji | artykuł w czasopiśmie |
| Otwarty dostęp | |
| Czasopismo/seria | Journal of Instrumentation |
Abstract
The design and measurement results of a power scalable 10-bit pipeline ADC developed for the luminosity detector at the future International Linear Collider (ILC) are discussed. The prototype is designed and fabricated in 0.35 μm CMOS technology. A wide spectrum of measurements of static (INL < 1 LSB, DNL < 0.5 LSB) and dynamic (SNHR > 58 dB, SINAD ∼ 58 dB) parameters are performed to understand and quantify the circuit performance. The ADC works for sampling rates from 1 kS/s to 25 MS/s covering more than four orders of magnitude. In most of the range power consumption scales linearly with sampling rate with a factor of 0.85 mW/MS/s. With ILC beam structure and sampling rate of about 3.5 MS/s, using the implemented in ASIC power switching off feature, an average power consumption of about 15 μW per channel may be obtained. The ADC layout is drawn with a constant pitch of 300 μm to facilitate a multichannel implementation.