Szczegóły publikacji
Opis bibliograficzny
Fast CMOS binary front-end for silicon strip detectors at LHC experiments / J. Kaplon, W. DĄBROWSKI // W: 2004 IEEE [Dokument elektroniczny] : NSS'04 Sessions ; MIC'04 Sessions ; RTSD'04 Sessions ; SNPS'04 Sessions : 16–22 October 2004, Rome, Italy : [special focus workshop] / guest ed. Tony Seibert ; IEEE, Nuclear & Plasma Sciences Society. — Wersja do Windows. — Dane tekstowe. — Piscataway, NJ : The Institute of Electrical and Electronics Engineers, Inc., cop. 2004. — 1 dysk optyczny. — (IEEE conference record – Nuclear Science Symposium & Medical Imaging Conference ; ISSN 1082-3654). — (CD-ROM). — e-ISBN: 0-7803-8701-5. — S. [1–5]. — Wymagania systemowe: Adobe Acrobat Reader ; napęd CD-ROM. — Bibliogr. s. [5], Abstr. — Tyt. przejęto z ekranu tytułowego. — Toż w wersji drukowanej. — ISBN 0-7803-8700-7. — S. 34–38
Autorzy (2)
- Kaplon Jan
- AGHDąbrowski Władysław
Dane bibliometryczne
| ID BaDAP | 34574 |
|---|---|
| Data dodania do BaDAP | 2007-10-08 |
| Rok publikacji | 2004 |
| Typ publikacji | materiały konferencyjne (aut.) |
| Otwarty dostęp |  |
| Czasopismo/seria | IEEE conference record – Nuclear Science Symposium & Medical Imaging Conference |
Abstract
We present the design and the test results of a front-end circuit developed in a 0.25 mu m CMOS technology. The aim of this work is to study the performance of a deep submicron process in applications for fast binary front-end for silicon strip detectors. The channel comprises a fast transimpedance preamplifier working with an active feedback loop, two stages of the amplifier-integrator circuits providing 22 ns peaking time and two-stage differential discriminator. particular effort has been made to minimize the current and the power consumption of the preamplifier, while keeping the required noise and timing performance. For a detector capacitance of 20 pF noise below 1500 e(-) ENC has been achieved for 300 mu A bias current in the input transistor, which is comparable with levels achieved in the past for a front-end using bipolar input transistor. The total supply current of the front-end is 600 mu A and the power dissipation is 1.5 mW per channel. The offset spread of the comparator is below 3 mV rms.
