Szczegóły publikacji
Opis bibliograficzny
Alvis approach to modeling and verification of real-time systems running on single-processor environment / Marcin SZPYRKA, Jarosław BANIEWICZ, Andrei KARATKEVICH // IEEE Access [Dokument elektroniczny]. — Czasopismo elektroniczne ; ISSN 2169-3536. — 2022 — vol. 10, s. 104178–104189. — Wymagania systemowe: Adobe Reader. — Bibliogr. s. 104188–104189, Abstr. — Publikacja dostępna online od: 2022-09-26
Autorzy (3)
Słowa kluczowe
Dane bibliometryczne
| ID BaDAP | 143456 |
|---|---|
| Data dodania do BaDAP | 2022-11-15 |
| Tekst źródłowy | URL |
| DOI | 10.1109/ACCESS.2022.3210191 |
| Rok publikacji | 2022 |
| Typ publikacji | artykuł w czasopiśmie |
| Otwarty dostęp |  |
| Creative Commons | |
| Czasopismo/seria | IEEE Access |
Abstract
Alvis is a formal modelling language developed primarily for modelling concurrent systems including real-time systems. The prepared model is compiled, and the resulting runnable model allows, e.g., to generate the state space and to verify the model using model checking techniques. The default version assumes that each system component (agent) executes its computations in parallel and that the hardware platform is not a shared resource. This paper describes an alternative approach in which agents remain concurrent, but compete for access to a single shared processor. This situation significantly affects the correctness of the system, in particular from the perspective of the timing properties of real-time systems. The key element of the presented solution is the fact that changing the runtime environment comes down to changing compiler options and does not require changes to the original model. This paper presents a method of designing Alvis language models for a single-processor hardware platform. The presented concepts are illustrated with examples.