Szczegóły publikacji
Opis bibliograficzny
High efficiency switched capacitor voltage doubler with planar core-based resonant choke / A. MONDZIK, Z. WARADZYN, R. STALA, A. PENCZEK // W: CPE-POWERENG 2016 [Dokument elektroniczny] : 2016 10th international conference on Compatibility, power electronics and power engineering : Bydgoszcz, Poland, 29 June–01 July, 2016 : USB proceedings. — Wersja do Windows. — Dane tekstowe. — Piscataway : IEEE, cop. 2016. — Dysk Flash. — e-ISBN: 978-1-4673-7292-3. — S. 402–409. — Wymagania systemowe: Adobe Reader. — Bibliogr. s. 409, Abstr.
Autorzy (4)
Słowa kluczowe
Dane bibliometryczne
| ID BaDAP | 99983 |
|---|---|
| Data dodania do BaDAP | 2016-10-12 |
| DOI | 10.1109/CPE.2016.7544222 |
| Rok publikacji | 2016 |
| Typ publikacji | materiały konferencyjne (aut.) |
| Otwarty dostęp | |
| Konferencja | 0th International Conference on Compatibility, Power Electronics and Power Engineering |
Abstract
This paper presents the research results of an optimized DC-DC voltage doubler based on a high-frequency resonant switched-capacitor (SC) topology. The converter utilizes a low weight PCB-type planar choke, and can be attractive for fuel cell- or battery-supplied systems which operate from low voltage where a voltage boost is needed. The optimization aims at minimizing power losses in the converter by an adequate selection of components, whereas low weight and small size are also advantageous. The problem is to minimize the resistance of the components and at the same time optimize the parameters of the resonant circuits. Improved efficiency in the switched-capacitor multipliers can also have the benefit of reducing voltage gain sensitivity for power variation. These types of converters are constant voltage gain circuits, but parasitic resistances can cause a substantial voltage gain drop as power rises, which can significantly limit the rated power. The paper contains an analytical discussion, an engineering assessment and experimental results of optimization issues in a MOSFET-based switched-capacitor voltage doubler (SCD) with a ferrite-based planar choke.