Szczegóły publikacji
Opis bibliograficzny
Dual-stage, time-over-threshold based prototype readout ASIC for silicon microstrip sensors / Krzysztof KASIŃSKI, Rafał KŁECZEK // Microelectronics Journal ; ISSN 0026-2692. — 2015 — vol. 46 iss. 12 Pt. A, s. 1248–1257. — Bibliogr. s. 1257, Abstr. — Publikacja dostępna online od: 2015-11-12
Autorzy (2)
Słowa kluczowe
Dane bibliometryczne
| ID BaDAP | 94599 |
|---|---|
| Data dodania do BaDAP | 2015-12-30 |
| Tekst źródłowy | URL |
| DOI | 10.1016/j.mejo.2015.10.011 |
| Rok publikacji | 2015 |
| Typ publikacji | artykuł w czasopiśmie |
| Otwarty dostęp |  |
| Czasopismo/seria | Microelectronics Journal |
Abstract
This paper presents the architecture details and measurement results of the prototype multichannel ASIC implementing a dual-stage charge sensitive processing chain based on a Time-over-Threshold technique. The readout front-end electronics is equipped with pulsed reset and it is dedicated for input charge measurements in semiconductor detector systems with sensor capacitances of few tens of pF. The presented solution reduces impact of important problems in the Time-over-Threshold charge processing chains, like pile-up effects and excessive dead time in case of artifact hits׳ overload. The key features of the presented solution are: low power consumption (2.5 mW/channel), charge and time measurements with linear transfer characteristic (INL=1.8%), large dynamic range (>10 fC) and linear transfer characteristics of Time-over-Threshold processing.
