Szczegóły publikacji
Opis bibliograficzny
Low voltage area efficient current-mode CMOS bandgap reference in deep submicron technology / Rafał KŁECZEK, Paweł GRYBOŚ // W: MIXDES 2014 [Dokument elektroniczny] : mixed design of integrated circuits and systems : Lublin, Poland June 19–21, 2014 : proceedings of the 21st international conference / ed. Andrzej Napieralski. — Wersja do Windows. — Dane tekstowe. — Łódź : Lodz University of Technology. Department of Microelectronics and Computer Science, cop. 2014. — 1 dysk optyczny. — na s. red. dod. ISBN 978-83-63578-04-6. — e-ISBN: 978-83-63578-03-9. — S. 247–250. — Wymagania systemowe: Adobe Reader ; napęd CD-ROM. — Bibliogr. s. 250, Abstr.
Autorzy (2)
Słowa kluczowe
Dane bibliometryczne
| ID BaDAP | 82883 |
|---|---|
| Data dodania do BaDAP | 2014-08-26 |
| DOI | 10.1109/MIXDES.2014.6872194 |
| Rok publikacji | 2014 |
| Typ publikacji | materiały konferencyjne (aut.) |
| Otwarty dostęp |  |
| Konferencja | International Conference "Mixed Design of Integrated Circuits and Systems" 2014 |
Abstract
We report on the design of a low voltage area efficient current-mode CMOS bandgap reference implemented in 130 nm technology. The conventional voltage-mode and current-mode bandgap reference architectures with their properties and performance limiting factors are described. Due to the low supply voltage V-DD requirement the current-mode architecture was chosen. The simulated power dissipation P-diss = 150 mu W at the nominal supply voltage V-DD = 1.2 V. As a result of Monte-Carlo analysis the average output reference current I-REF approximate to 1 mu A and its standard deviation sigma = 11 nA are obtained. The reference current changes Delta I-REF = 8 nA over the temperature range from 0 degrees C up to 100 degrees C. The reference current changes Delta I-REF = 4 nA for the supply voltage V-DD within the range from 1 V up to 1.5 V. The silicon chip area occupation is 0.07 mm(2).
