Szczegóły publikacji
Opis bibliograficzny
Compliance verification of the phasor estimation based on Bertocco-Yoshida Interpolated DFT with leakage correction / Szymon BARCZENTEWICZ, Dariusz BORKOWSKI, Krzysztof DUDA // W: SPA 2013 : Signal Processing : Algorithms, Architectures, Arrangements, and Applications : Poznań, 26–28th September 2013 : conference proceedings / IEEE The Institute of Electrical and Electronics Engineers Inc. Region 8 – Europe, Middle East and Africa. Poland Section. Chapters Signal Processing, Circuits and Systems, Poznań University of Technology. Faculty of Computing. Chair of Control and System Engineering. Division of Signal Processing and Electronic Systems. — Poznań : PUT, [2013]. — ISBN: 978-83-62065-15-8; e-ISBN: 978-83-62065-17-2. — S. 61–64. — Bibliogr. s. 64, Abstr.
Autorzy (3)
Słowa kluczowe
Dane bibliometryczne
| ID BaDAP | 78914 |
|---|---|
| Data dodania do BaDAP | 2014-01-21 |
| Rok publikacji | 2013 |
| Typ publikacji | materiały konferencyjne (aut.) |
| Otwarty dostęp |  |
| Konferencja | Signal Processing Algorithms, Architectures, Arrangements, and Applications 2013 |
Abstract
In this paper some of compliance tests advised by IEEE Standard for Synchrophasor Measurements for Power Systems are conducted upon the phasor estimated by Interpolated DFT (IpDFT) Bertocco-Yoshida (BY) order 1 algorithm with spectral leakage correction. The results are compared with well-known two-point IpDFT with Hann window. Steady-state and dynamic compliance tests showed very good results for BY IpDFT with leakage correction for the phasor estimated from 1, 2, and 5 periods of 50 Hz fundamental.
