Szczegóły publikacji
Opis bibliograficzny
Low voltage analog multipliers based on CMOS inverters / W. MACHOWSKI, J. JASIELSKI, W. Kołodziejski, S. KUTA // W: MIXDES 2008 : MIXed DESign of integrated circuits and systems : proceedings of the 15th international conference : Poznań, Poland, 19–21 June, 2008 / ed. Andrzej Napieralski. — Łódź : Department of Microelectronics and Computer Science, Technical University of Łódź, cop. 2008 + CD-ROM. — ISBN: 83-922632-7-8. — S. 267–270. — Bibliogr. s. 270, Abstr. — W bazie Web of Science ISBN: 978-83-922632-7-2
Autorzy (4)
- AGHMachowski Witold
- AGHJasielski Jacek
- Kołodziejski Wojciech
- AGHKuta Stanisław
Dane bibliometryczne
| ID BaDAP | 39661 |
|---|---|
| Data dodania do BaDAP | 2008-07-14 |
| Rok publikacji | 2008 |
| Typ publikacji | materiały konferencyjne (aut.) |
| Otwarty dostęp |
Abstract
In the paper we consider two examples of analog multipliers suitable for low votage CMOS technology. The second of the circuits presented is an example of newly proposed class of the analog CMOS circuits based on inverters with modified differential steering - separate for N- and P-transistor. This leads to very low supply voltage requirements - thus the necessary supply voltage only slightly exceeds single threshold voltage. Simulation results as well as experimental data for one implementation are presented.