Szczegóły publikacji

Opis bibliograficzny

Pole-zero cancellation circuit with pulse pile-up tracking system for low noise charge-sensitive amplifiers / Paweł GRYBOŚ, Robert SZCZYGIEŁ // IEEE Transactions on Nuclear Science ; ISSN 0018-9499. — 2008 — vol. 55 no. 1, s. 583–590. — Bibliogr. s. 590, Abstr.

Autorzy (2)

Słowa kluczowe

pole-zero cancellation circuitcharge sensitive amplifierpulse pile-up

Dane bibliometryczne

ID BaDAP37717
Data dodania do BaDAP2008-02-27
Tekst źródłowyURL
DOI10.1109/TNS.2007.914018
Rok publikacji2008
Typ publikacjiartykuł w czasopiśmie
Otwarty dostęptak
Czasopismo/seriaIEEE Transactions on Nuclear Science

Abstract

Modern X-ray imaging systems require low noise high-count-rate multichannel front-end electronics. Such systems widely use charge-sensitive amplifiers (CSA) with pole-zero cancellation (PZC) circuits for sensor readout. CSAs in multichannel ASICs often include continuous reset systems based on MOS transistors discharging the integrating capacitance. Noise requirements for such front-end electronics put the effective CSA feedback resistance in the range of hundreds of M Omega. On the other hand, the high input pulse rate generates a de voltage shift at the CSA output that modifies the CSA feedback resistance and degrades the PZC circuit performance. In the paper we analyze these problems and propose a novel circuit solution to bias transistors in the CSA feedback and in the PZC circuit. This bias circuit tracks the above mentioned voltage shift at the CSA output and ensures proper cancellation of the CSA feedback pole even in the case of high rates of input pulses. We present measurements of a test structure for the continuous CSA feedback discharge and implementation of this circuit in a fast multichannel ASIC manufactured in the 0.35 mu m CMOS technology. The circuit performance for the high input pulse rate is described in detail.

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