Szczegóły publikacji

Opis bibliograficzny

Latency characteristics of event-driven task schedular embedded in neuron chip / Marek MIŚKOWICZ // IJCSNS International Journal of Computer Science and Network Security ; ISSN 1738-7906. — 2007 — vol. 7 no. 12, s. 132–139. — Bibliogr. s. 139, Summ.

Autor

Słowa kluczowe

timing analysissystem architecturesmicroprocessor controlfieldbusdelay analysiseventsscheduling algorithms

Dane bibliometryczne

ID BaDAP37195
Data dodania do BaDAP2008-02-07
Tekst źródłowyURL
Rok publikacji2007
Typ publikacjiartykuł w czasopiśmie
Otwarty dostęptak
Czasopismo/seriaInternational Journal of Computer Science and Network Security

Abstract

The paper presents the experimental measurements of the temporal measures of the task scheduler embedded in Neuron Chip microcontroller. The investigated task scheduler dynamically manages sharing the Application Processor between tasks in smart devices developed in LonWorks control networking technology. Since the event-driven architecture does not provide the explicit management of time, the evaluation of the latency characteristics of software has to be handled indirectly. We have constructed a set of testing procedures that connect the scheduler operations with input/output actions. The latter can be analyzed by the standard measurement instrumentation. Finally, some information that can support timing-aware Neuron Chip programming is provided.

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