Szczegóły publikacji
Opis bibliograficzny
SoC-FPGA based concept of hardware aided quantum simulation / Jacek DŁUGOPOLSKI, Jakub Czerski, Mateusz Knapik // Journal of Automation, Mobile Robotics & Intelligent Systems : JAMRIS ; ISSN 1897-8649. — 2024 — vol. 18 no. 2, s. 17–23. — Bibliogr. s. 22–23, Abstr. — Publikacja dostępna online od: 2024-06-04
Autorzy (3)
- AGHDługopolski Jacek
- Czerski Jakub
- Knapik Mateusz
Słowa kluczowe
Dane bibliometryczne
| ID BaDAP | 153636 |
|---|---|
| Data dodania do BaDAP | 2024-06-17 |
| Tekst źródłowy | URL |
| DOI | 10.14313/JAMRIS/2-2024/9 |
| Rok publikacji | 2024 |
| Typ publikacji | artykuł w czasopiśmie |
| Otwarty dostęp |  |
| Creative Commons | |
| Czasopismo/seria | Journal of Automation, Mobile Robotics and Intelligent Systems |
Abstract
Contemporary industry and science expectations towards technological solutions set the bar high. Current approaches to increasing the computing power of standard systems are reaching the limits of physics known to humankind. Fast, programmable systems with relatively low power consumption are a different concept for performing complex calculations. Highly parallel processing opens up a number of possibilities in the context of accelerating calculations. Application of SoC (System On Chip) with FPGA (Field-Programmable Gate Array) enables to delegate of a part of computations to the gates matrix, thereby expediting processing by using parallelization of hardware operations. This paper presents the general concept of using SoC FPGA systems to support CPU (Central Processing Unit) in many modern tasks. While some tasks might be really hard to implement on an FPGA in a reasonable time, the SoC FPGA platform allows for easy low-level interconnections, and with such virtualized access to the hardware computing resources, it is seen as making FPGAs, or hardware in general, more accessible to engineers accustomed to high-level solutions. The concept presented in the article takes into account the limited resources of cheaper educational platforms, which, however, still provide an interesting and alternative hybrid solution to the problem of parallelization and acceleration of data processing. This allows to overcome encountered limitations and maintain the flexibility known from high-level solutions and high performance achieved with low-level programming, without the need for a high financial background.
