Szczegóły publikacji
Opis bibliograficzny
Input current ripple reduction in a step-up DC–DC switched-capacitor switched-inductor converter / Robert STALA, Zbigniew WARADZYN, Szymon FOLMER // IEEE Access [Dokument elektroniczny]. — Czasopismo elektroniczne ; ISSN 2169-3536. — 2022 — vol. 10, s. 19890–19904. — Wymagania systemowe: Adobe Reader. — Bibliogr. s. 19903–19904, Abstr. — Publikacja dostępna online od: 2022-02-17
Autorzy (3)
Słowa kluczowe
Dane bibliometryczne
| ID BaDAP | 139483 |
|---|---|
| Data dodania do BaDAP | 2022-03-17 |
| Tekst źródłowy | URL |
| DOI | 10.1109/ACCESS.2022.3152543 |
| Rok publikacji | 2022 |
| Typ publikacji | artykuł w czasopiśmie |
| Otwarty dostęp |  |
| Creative Commons | |
| Czasopismo/seria | IEEE Access |
Abstract
This paper presents research results related to the concept of a high-voltage-gain DC-DC converter with a low input current ripple. In the proposed topology, a low-volume DC-DC switch-mode boost converter operates in parallel with a switched-capacitor voltage multiplier (SCVM). The overall converter achieves a four-fold voltage gain, but the voltage stress of the transistor and the diode of the boost converter is only half of the output voltage. This is achieved by applying the specific topology of the proposed converter. Furthermore, the boost part uses a low-volume choke as it operates in the discontinuous conduction mode (DCM). The parallel operation of the boost converter and the SCVM decreases the current stress in some components of the multiplier. This paper presents a concept of the hybrid converter, an analytical model for the selection of components and switching parameters, an efficiency model, and the verification of the converter operation through simulation tests and experiments.