Szczegóły publikacji
Opis bibliograficzny
The SALT-readout ASIC for silicon strip sensors of upstream tracker in the upgraded LHCb experiment / Carlos Abellan Beteta, [et al.], Roma BUGIEL, Szymon BUGIEL, [et al.], Mirosław FIRLEJ, Tomasz FIUTOWSKI, [et al.], Marek IDZIK, [et al.], Wojciech KRUPA, [et al.], Jakub MOROŃ, [et al.], Krzysztof ŚWIENTEK, Tomasz SZUMLAK, [et al.] // Sensors [Dokument elektroniczny]. — Czasopismo elektroniczne ; ISSN 1424-8220. — 2022 — vol. 22 iss. 1 art. no. 107, s. 1–21. — Wymagania systemowe: Adobe Reader. — Bibliogr. s. 19–21, Abstr. — Publikacja dostępna online od: 2021-12-24
Autorzy (43)
- AGHBugiel Roma
- AGHBugiel Szymon
- AGHFirlej Mirosław
- AGHFiutowski Tomasz
- AGHIdzik Marek
- AGHKrupa Wojciech
- AGHMoroń Jakub
- AGHSzumlak Tomasz
- AGHŚwientek Krzysztof
- Andreou Dimitra
- Artuso Marina
- Beiter Andy
- Beteta Carlos Abellan
- Blusk Steven
- Carbone Antonio
- Carli Ina
- Chen Bo
- Conti Nadim
- de Benedetti Federico
- Ding Shuchong
- Ely Scott
- Gandini Paolo
- Germann Danielle
- Grieser Nathan
- Jiang Xiaojie
- Li Yiming
- Li Zhuoming
- Liang Xixin
- Liu Shuaiyi
- Lu Yu
- Mackey Lauren
- Mountain Ray
- Petruzzo Marco
- Pham Hang
- Schmidt Burkhard
- Sheng Shuqi
- Spadaro Norella Elisabetta
- Tobin Mark
- Wang Jianchun
- Wilkinson Michael
- Wu Hangyi
- Zhang Feihao
- Zou Quan
Słowa kluczowe
Dane bibliometryczne
| ID BaDAP | 138893 |
|---|---|
| Data dodania do BaDAP | 2022-01-28 |
| Tekst źródłowy | URL |
| DOI | 10.3390/s22010107 |
| Rok publikacji | 2022 |
| Typ publikacji | artykuł w czasopiśmie |
| Otwarty dostęp |  |
| Creative Commons | |
| Czasopismo/seria | Sensors |
Abstract
SALT, a new dedicated readout Application Specific Integrated Circuit (ASIC) for the Upstream Tracker, a new silicon detector in the Large Hadron Collider beauty (LHCb) experiment, has been designed and developed. It is a 128-channel chip using an innovative architecture comprising a low-power analogue front-end with fast pulse shaping and a 40 MSps 6-bit Analog-to-Digital Converter (ADC) in each channel, followed by a Digital Signal Processing (DSP) block performing pedestal and Mean Common Mode (MCM) subtraction and zero suppression. The prototypes of SALT were fabricated and tested, confirming the full chip functionality and fulfilling the specifications. A signal-to-noise ratio of about 20 is achieved for a silicon sensor with a 12 pF input capacitance. In this paper, the SALT architecture and measurements of the chip performance are presented.
